SDD 2007 - Call for Papers

CALL FOR PAPERS

Scope and Mission -- Author Information -- Committees

Scope and Mission

Troubleshooting how and why systems and circuits fail is important and is rapidly growing in industry significance. Debug and diagnosis may be needed for yield improvement, process monitoring, correcting the design function, failure mode learning for R&D, or just getting a working first prototype. This detective work can however become very tricky. Sources of difficulty include circuit and system complexity, packaging, limited physical access, shortened product creation cycle and time-to-market, the traditional focus on only pass/fail testing and missing tool and equipment capabilities. New and efficient solutions for debug and diagnosis will have a much needed and highly visible impact on productivity. The mission and objective of the SDD07 Workshop is to consider all issues related to debug and diagnosis of systems and circuits – from prototype bring-up to volume production.

The topics of interest include, but are not limited to, the following:

Debug Techniques and Methodologies
Structured Debug Architectures
Infrastructure IP for SDD
Design/Synthesis for Debug
Microprocessor Debug
Debug for FPGAs
DFT Reuse for Debug and Diagnosis
Debug of Embedded Cores/SoCs
Digital/analog Turn-on
Methods & Tools
System Level Debug & Diagnosis
Equipment Impact and Techniques
Manufacturing & Prototype Environment
Debug Standardization
Case Studies

Author Information

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The workshop objective is to facilitate a valuable interactive information exchange. Contributions ranging from extended abstracts to full papers are acceptable for submission. Contributions that provide more detail have a higher chance of being acceptance. Proposals that describe open issues, industry/technology needs or opinions are also welcome.

Length Guideline: ranging from a one page, extended abstract up to 8 pages
Submissions due: March 7, 2007
Acceptance Notification: March 28, 2007
Final papers for inclusion into informal proceedings: April 18, 2007

Proposals for discussion panels and other special sessions are also invited. Please submit a 1 page abstract for these to the web site or contact the Program Chair.

For general information contact:

R. Aitken - General Chair
ARM
141 Caspian Court
Sunnyvale, 94089 CA, USA
Phone: +1 408 548 3297
Email: rob.aitken@arm.com

For submission & program information contact:

B. Vermeulen - Program Chair
NXP Semiconductors
High Tech Campus 5
5656 AE Eindhoven, The Netherlands
Phone: +31 40 2749367
Email: bart.vermeulen@nxp.com

Committees

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General Chair
R. Aitken – ARM

Program Chair
B. Vermeulen – NXP Semi.

Past Program Chair
F. Muradali – National Semi

Special Session Chair
N. Nicolici – McMaster U.

Finance Chair
M. Ricchetti – AMD

Arrangements Chair
S. Goel – Novas

Local Arrangements
S. Disch – U. Freiburg

Electronic Media
I. Bayraktaroglu – Sun

Program Committee
M. Abramovici – DAFCA
D. Appello – ST Microelectronics
C. Boit – TU Berlin
W-T Cheng – Mentor Graphics
B. Cory – nVidia
A. Crouch – Inovys
J. Figueras – U. Barcelona
D. Gizopoulos – U. Piraeus
I. Hartanto – Xilinx
K. Hatayama – STARC
Y-C. Hsu – Novas
D. Josephson – Intel
R. Kapur – Synopsys
H. Kerkhoff – U. Twente
C. Landrault – LIRMM
T. McLaurin – ARM
C. Metra – U. Bologna
Y. Okuda – Sony
A. Orailoglu – UCSD
P. Prinetto – Poli. Di Torino
M. Renovell – LIRMM
M.S. Reorda – Poli. Di Torino
N. Stollon – First Silicon Solutions
C. Sul – Silicon Image
J. Tyzer – U. Poznan
S. Venkataraman – Intel
B. West
H. Wienrich – National Semi.

Steering Committee
R. Aitken – ARM
F. Muradali – National Semi.
E.J. Marinissen – NXP Semi.
M. Ricchetti – AMD (chair)
T. W. Williams – Synopsys
Y. Zorian – Virage Logic

For more information, visit us on the web at: http://evia.ucsd.edu/conferences/sdd/07

The 4th IEEE International Workshop on Silicon Debug and Diagnosis (SDD07) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).